Virtualyzr by Secure-IC facilitates security evaluation with risk assessment tools. It is a key step in implementing security in SoC design, helping reduce time-to-market and post tape-out maintenance. By emulating device behavior at the design stage, it allows anticipation and protection against security weaknesses before they become issues. Virtualyzr evaluates side-channel security during the pre-silicon design stage. It provides a security verification layer that integrates with the functional verification workflow, allowing security checkpoints at various design levels. It detects and characterizes security vulnerabilities, mapping them to the design to help locate and address potential issues. This evaluation is cost-effective as it requires no measurement equipment or platform. Evaluation of mixed design (hardware and software) involves three steps for pre-silicon evaluation: The design is simulated at the conception level (RTL/Post Synthesis/Place & Route). Simulated traces are obtained for evaluation with Virtualyzr. The simulated traces are processed using a mathematical consumption model. An advanced physical analysis is conducted on the leakage traces, allowing for side-channel attacks and fault injection attacks analysis. Virtualyzr is a tool which is part of a larger solution called Laboryzr specifically designed to support companies through all the security stages of the design life-cycle.
